Kaben Wireless Silicon

Kaben's field programmable DIF can provide an IF output up to 300 MHz, and a bandwidth up to 20 MHz. The DIF provides a spurious free dynamic range of 60 dB, and an image rejection of 60 dB. The DIF includes integrated, semi-digital FIR filters which eliminates aliased signals, removes quantization noise, and provides pass band sin x/x correction. High linearity (12 bits) and zero phase dispersion are provided by the DIF.

The Converter accepts a digital baseband input and upconverts the signal to an IF frequency, up to 400 MHz. The in-phase and quadrature digital input can have up to 2 MHz bandwidth each, for a combined 4 MHz bandwidth.

Five of the 4 MHz cells can be stacked (in parallel) to provide 20 MHz total bandwidth. When stacked, the digital baseband inputs are fed directly into the cells, each of which is tuned to an individual 4 MHz band. Each cell in turn provides 50 dB of rejection of all adjacent bands.

The high IF frequency reduces the requirement for off-chip RF output filtering, thereby reducing cost and size. The high linearity of 12 bits and spurious free dynamic range of 60 dB makes this product an ideal selection for transmitters employing complex modulation formats such as OFDM and high data-rate multi-level QAM.

The Digital-to-IF Converter inherently provides band-pass and anti-aliasing filtering with zero phase dispersion, thereby delivering undistorted up-conversion of the digital baseband complex signal. For advanced signal structures supporting high data rates such as OFDM, generating the up-converted transmit signal with zero dispersion is crucial in maintaining acceptable bit error rate performance.

Using high IF frequencies simplifies the off-chip RF filters because the image frequency and the LO frequency will be farther away from the desired output frequency.

The Image Rejection of 60 dB and Spurious Free Dynamic Range (SFDR) of 60 dB is useful in OFDM and QAM transmitter architectures. This unique ∆∑ DAC eliminates the issue of quantization noise by removing it with an integrated on-chip FIR Filter. The DAC and FIR Filter provides adjacent band rejection of 50 dB.

Layout of the design can be performed in a customer's standard digital flow by incorporating Kaben's customized cells into the libraries that are used by the auto place and route software.

The DIF is ideal for WiMAX 802.16a, WLAN (Wi-Fi) 802.11a, 802.11b, 802.11g, 802.11h, and 802.11n, Bluetooth, Software Defined Radios (SDR), Multi-mode Radios, and Cable Modem products.

The major blocks of the Digital-to-IF converter are shown in the accompanying figure. First, multi-bit (typically 10 bits) digital I (in-phase) and Q (quadrature-phase) data streams are up-sampled, and reduced in their number-of-bits (to typically 2 bits) in the dual ∆∑ converters. The ∆∑ converters provide the up-sampling while relegating the quantization noise to out-of-band frequencies. They also convert each (typically 2 bit) output signal into parallel circuit tracks (typically 3) representing the possible 4 values of the output. A circuit track representing the zero value is not required in the subsequent Semi-digital filters, and hence is not included. Dynamic Element Matching is used in this process to eliminate the non-linear effects of component mismatch.

The two outputs from the two ∆∑ converters are then passed to two semi-digital FIR filters. Architecturally, each semi-digital FIR filter is identical to a classic FIR digital filter, except that the weighting coefficients at the output of each delay stage are parallel one-bit analog-to-digital converters (typically 3) attached to the parallel circuit tracks. The analog outputs from the parallel one-bit analog-to-digital converters at all delay tap outputs of the FIR structure are then summed together to form a filtered analog version of the digital baseband input signal. Further, due to the up-sampling, the FIR filter response can be chosen to select the desired analog IF bandpass (aliased) replica of the digital baseband input, thereby achieving up-conversion from baseband

The two (I and Q) IF bandpass signals are then combined and provided to the analog IF input to the transmitter's up-conversion mixer.

Providing the high frequency clock for the ∆∑ converters and the semi-digital filters can be readily achieved using a delay-locked loop driven with a low frequency reference clock. As in all sampling techniques, the delay-locked loop installs a sin x / x weighting onto the baseband signals tailored to selecting the desired alias. This can easily be refined for by adjustment to the tap coefficient weights at each delay element output in the semi-digital FIR filter to obtain a filter sufficiently narrow to suppress quantization of the ∆∑ converter.