Kaben Wireless Silicon

Kaben's All-Digital Fractional-N PLL synthesizers provide ultra-low phase noise performance and ultra-low in-band spurious emissions, in a significantly reduced die area compared with conventional fractional-N synthesizer architectures.

This size reduction is achieved through the use of all-digital FIR filters in the PLL, replacing conventional analog filters requiring large die area capacitors. Not only does the elimination of these large capacitors save on the synthesizer size, it also greatly reduces the effects of process, voltage, and temperature change on performance. The replacement of the analog filter and its large capacitors with an all-digital filter, along with a relaxed power regulation requirement, yields up to a 40% reduction in die area with an associated savings in cost.

The All-Digital PLL architecture is a technology enabler for the IEEE1588, Timing-over-Packet, and other network-based timing requirements. In addition, its fast acquisition, fast frequency hopping, QAM modulation capability, and reconfigurability make it extremely attractive in many diverse wireless applications.

Off-Chip Jitter Attenuators:

For Off-Chip Jitter Attenuators, and other large time-constant, ultra low-bandwidth applications, Kaben's All-Digital PLL realizes a massive area reduction, since the digital loop filter is only a fraction of the size of a conventional analog implementation. Using an external VCXO or VCSO, this All-Digital PLL offers the best area / performance trade-off.

On-Chip Jitter Attenuator:

The digital domain signal path of Kaben's All-Digital PLL can easily accommodate additional, digitally-driven operations to facilitate the replacement of expensive off-chip VCXOs / VCSOs with cheaper on-die clock sources. The output frequency of this digitally controlled, on-die “high-Q” oscillator is programmable, providing an economical alternative to an expensive bank of off-chip VCXOs. The On-Chip Jitter Attenuator offers the best cost-savings / area / performance trade-off.

All-Digital PLL for Network Synchronization:

Kaben's All-Digital PLL technology facilitates network synchronization products, by enabling quantum phase and frequency adjustments to be controlled by customer-based processors. The All-Digital PLL can also be configured to provide rate adjust control, holdover mode, and spread-spectrum synchronization.

General All-Digital PLLs for Wireline / Optical and Wireless Applications:

Kaben's All-Digital PLLs provide reduced die-area, reduced RFIC process sensitivity, and enhanced programmable flexibility. They offer exceptionally low phase noise and spurii levels, and being all-digital, can easily migrate to smaller digital-centric processes.

The All-Digital PLLs can be used for low-jitter Tx PLLs in SerDes/Serial Links. Reduced sensitivity to process variations, and enhanced immunity to multi-channel related noise, are achieved through the absence of analog signal processing. This in turn, leads to a better aggregate BER under multichannel conditions.